Ars Technica

ASIC design/verification or embedded systems programming

1. In a big company, doing ASIC design verification for a WCDMA modem for 3G cellular chips. 2. Small company, doing Embedded Software Programming. Working on the design and implementation of layer 1 ...
Semiconductor Engineering

ASIC/IC Verification Trends With A Focus On Factors Of Silicon Success

At long last we come to the final installment of our four-part series presenting the findings of the Wilson Research Group Functional Verification 2020 study. In this article we discuss verification ...
EDN

Test engineers must join ASIC flow early

Paul Taubman is a senior design engineer for Tality Corp., Cadence Design Systems' services organization. In this article he shows how test engineers should interact with designers in order to ...
Semiconductor Engineering

Beyond The Water Cooler: 2020 Report On IC/ASIC Design And Verification Trends

Verification and design engineers like to talk shop and discuss their experiences and visions. But even though engineers sharing stories around the water cooler (whatever form that takes—conferences, ...
Business Wire

MathWorks Speeds FPGA and ASIC Verification with Universal Verification Methodology (UVM) Support

NATICK, Mass.--(BUSINESS WIRE)--MathWorks today announced that HDL Verifier provides support for the Universal Verification Methodology (UVM) starting with Release 2019b, which is currently available.