TMCnet

MicroCloud Hologram Inc. FPGA-Based High-Performance Surface Code Quantum Simulation Platform: Efficient Error Correction Algorithm Validation under Rotated Layout

MicroCloud Hologram Inc. (NASDAQ: HOLO), ("HOLO" or the "Company"), a technology service provider, has developed a surface code quantum simulator based on FPGA. This innovative technology marks a new ...
EDN

ASIC, FPGA simulator reduces run times

The Riviera 2005.08 ASIC, FPGA simulator tool provides VHDL and Verilog Linting and support for 64-bit Linux operating systems. The tool features a redesigned simulation engine that reduces simulation ...
Seeking Alpha

WiMi Develops a Hybrid CPU-FPGA Quantum AI Simulator

BEIJING, Jan. 14, 2025 /PRNewswire/ -- WiMi Hologram Cloud Inc. (WIMI) ("WiMi" or the "Company"), a leading global Hologram Augmented Reality ("AR") Technology provider, today announced the ...

MicroCloud Hologram Inc. Proposes Quantum AI Simulator Adopting Hybrid CPU-FPGA Method, Achieving Efficient Image Classification Simulation Through Heterogeneous Computing

MicroCloud Hologram Inc. (NASDAQ: HOLO), (“HOLO” or the "Company"), a technology service provider, proposed a quantum AI simulator that adopts a hybrid CPU-FPGA method. This system performs ...
Nasdaq

Lattice Diamond Software Tool Delivers New Enhancements for FPGA Design, Simulation, and Verification

HILLSBORO, Ore.--(BUSINESS WIRE)-- Lattice Semiconductor Corporation (NASDAQ: LSCC), the low power programmable leader, today announced availability of the latest version of its popular FPGA design ...
Seeking Alpha

MicroCloud Hologram Inc. Builds the Industry's First Multi-FPGA Quantum Fourier Transform Simulation Solution

SHENZHEN, China, Jan. 8, 2026 /PRNewswire/ -- MicroCloud Hologram Inc. (NASDAQ: HOLO), ("HOLO" or the "Company"), a technology service provider, launched a brand-new scalable quantum Fourier transform ...
Business Wire

Aldec Introduces Hardware Assisted RTL Simulation Acceleration for Microchip FPGA Designs

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed-HDL language simulation and hardware-assisted verification for ASIC and FPGA designs, has introduced a HES-DVM™ simulation ...
EDN

Aldec® Delivers $1,995 Mixed Language Simulator to FPGA Market

Active-HDL Designer Edition is available today and supports Windows 32/XP/Vista operating systems. The product is offered as a one year time based license and available as either a node locked ($1,995 ...
Electronic Design

Mixed-Language Simulator Serves FPGA Designers

In the Active-HDL Designer Edition, a low-cost mixed-language RTL simulator, designers gain a high-performance simulator for designs targeted at FPGAs. Basically, FPGA designers have been forced to ...
Electronic Design

FPGA Design and Simulation Bundles Aid OrCAD Users

The company’s latest FPGA design and simulation bundles provide OrCAD users with a complete flow for PCB and FPGA design. The company’s latest FPGA design and simulation bundles provide OrCAD users ...